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Position related to VHDL Design and synthesis of computer vision functions at Universidad Politécnica de Cartagena (Spain)
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Job description
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This position is offered in the framework of the Spanish Government “Design and implementation of architectures enhanced for analog to digital conversion and low, medium and high level image processing” research Project. Feature extraction is an essential part in applications that require computer vision to recognize objects in an scene. To extract the features robustly in scenarios with scale, rotation or illumination changes, feature extraction algorithms are often very demanding in computation so current performance levels achieved by pure software are far from real time. Thus, a hardware implementation able to exploit the inherent parallelism of such image processing tasks is needed to speed up these operations as well as to reduce power dissipation. The hardware implementations will be used for intelligent transportation systems and security applications. 
 
The job will focus on the following tasks:
 
-       Design and synthesis of medium level image processing algorithms (SIFT detector as well as region-based detectors such us SAD, NCC,…).
-       Analysis of simplifications of the mentioned algorithms which allow them to be synthesised reducing the number of hardware resources.
-       Implementations must be able to analyze gray level VGA images in real time (30 frames per second)
 
Designs will be done at register transfer level using VHDL.
 
 
Required profile
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Candidates should have a Degree or Master in Computer Engineering, Electronics Engineering or closely related disciplines, and proven experience in digital synthesis.
 
According to Spanish Public Administration regulations, the candidate must have a Degree issued by an European University according to the European Credit Transfer System (ECTS)
 
Conditions
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- Application deadline: open process until the position is filled
- Dedication: 37.5 hours/week
- Salary: EUR 25,000 annual gross salary. Contract: up to December 2018
- Starting date: Aprox. April 2017
- Location: Cartagena (Murcia) –Spain-     www.upct.es
 
 
Application
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Interested candidates should submit by email ( gines.domenech@upct.es): 1) detailed CV, 2) Abstract detailing his/her experience in the field of the job; 3) a maximum of two contacts persons to act as a reference if needed.